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타이틀	Xilinx V4 Package Reliability: Properties and Reliability of LP2 Underfill Material
저자	Suh, Jong-ook;; Dillon, R. Peter
Keyword	CHIPS (ELECTRONICS); EARTH ORBITAL ENVIRONMENTS;; ELECTRONIC PACKAGING;; FIELD-PROGRAMMABLE GATE ARRAYS;; MATERIALS SELECTION;; PERFORMANCE TESTS;; RELIABILITY;; SOLDERS;; THERMAL CYCLING TESTS;; THERMAL EXPANSION;; THERMOPHYSICAL PROPERTIES;; VACUUM
URL	http://hdl.handle.net/2060/20120006116
보고서번호	JPL-Publ-12-6
발행년도	2012
출처	NTRS (NASA Technical Report Server)
ABSTRACT	The Xilinx V4 is a strong candidate for the next-generation FPGA for NASA applications. The major concern regarding the V4 is its non-hermeticity. Due to the non-hermeticity, the underfill material, LP2, will be directly exposed to the LEO environment, albeit within a spacecraft, during the mission. In the current task, reliability of the V4 package was studied in terms of the underfill material under the flight mission environment. During FY11, raw LP2 underfill material was procured and went through a series of tests to measure its properties and to study its behavior. We have confirmed that properties such as Tg, CTE, Young s modulus, and lap shear strength of the LP2 underfill are suitable for high-reliability ceramic flip chip package applications. We also confirmed that the LP2 underfill material maintains high lap shear strength under a wide range of temperatures relevant to space applications. The LP2 underfill material has good outgassing reliability under both vacuum thermal cycling and radiation environment.